Applied Methods
~The MetaPhysical SystemsChip & Silicon Engineer

Chip & Silicon Engineer

Chip & Silicon Engineers at AI companies work across the chip-design lifecycle for AI accelerators and supporting silicon—from RTL and microarchitecture through physical design, verification, and post-silicon validation. The role spans front-end design (architecting blocks, writing RTL, running simulation), physical design (synthesis, place-and-route, timing closure, power-performance-area optimization), and post-silicon work (bring-up, characterization, debug across hardware, firmware, and software layers). Specialization within this slug varies—some engineers focus narrowly on one phase of the pipeline, others coordinate across phases—but the population spans the full chain rather than concentrating on any single stage. These engineers typically sit within silicon, hardware, or platform engineering organizations at chip-focused AI companies, collaborating closely with verification, software, and systems teams to deliver production silicon.

$ titles --canonical
SoC ArchitectRTL Design EngineerPhysical Design EngineerSilicon Verification EngineerASIC Design EngineerFPGA EngineerPost Silicon Validation EngineerAdvanced Packaging TechnologistSilicon Emulation EngineerStaff SoC ArchitectAI Silicon Physical Design Engineer
Open Jobs68
Companies Hiring11
$ expectations --role chip-&-silicon-engineer

Measured across 68 of 68 open postings.

3%
expect AI in the role's own work
0% state it as a requirement
3%
work directly with customers
27%
manage people
Senior
most common level
37% of open postings
BY LEVEL

This role is advertised at 3 levels, so a single figure for the role would describe none of them. Experience and pay are the midpoints for each level on its own.

LevelShareMedian yearsMedian pay
Mid22%(15)——
Senior37%(25)8—
Staff / Principal34%(23)8—

A dash means too few postings stated it to report a midpoint. Most companies do not publish a salary band, so pay is indicative rather than a market rate. 1 level with fewer than 10 open postings is not shown.

WHAT THEY ASK FOR, VERBATIM

“pair that flow with AI tooling, ours and the industry's, to make each iteration faster than the last”

Ricursive Intelligence · Chip Design Engineer

“Build and share AI-assisted approaches to the code-like parts of your domain, and help the team learn what Claude can genuinely accelerate”

Anthropic · Silicon Engineer
$ barriers
8%
advertised as remote
of postings that state a work mode
46%
state a degree requirement
86%
still advertised a month later
about typical for the board

Requirements are a share of every open posting, so a role missing from this list is one where almost nobody asks. Work mode is different: many postings never say, so that figure counts only the ones that do. A posting stops being advertised when it is filled, cancelled or reorganised, so read the last figure as how long these stay on the market, not as time to hire.

$02

Skills

What companies are looking for in this role.

$ skills --core

Silicon and SoC design

74%

Hardware test and validation

57%

Hardware bring-up and debug

46%

Systems performance optimization

44%

Infrastructure automation and IaC

27%

Hardware and embedded systems

27%

Design for manufacturability

22%

Reliability and failure analysis

21%

Distributed systems architecture

21%

Technical program management

16%

Technical issue diagnosis

13%

Research experiment design

12%

Model architecture design

9%

Thermal and structural analysis

9%
$ skills --emerging

Test automation and instrumentation

25%
$ skills --soft

Cross-functional collaboration

49%

Technical team leadership and mentoring

28%

Mentoring and code review

18%

Technical documentation

10%
$03

Technology

The tools and technologies that define this role.

$ tech --language
Pythonvery high
C/C++moderate
C++moderate
SystemVerilogmoderate
Verilogmoderate
Bashlow
$ tech --platform
Linuxmoderate
$ tech --tool
Gitlow
$ tech --concept
PCIemoderate
DDR memorylow
Ethernetlow
FPGAlow
I2Clow
JTAGlow
SPIlow
UARTlow
$04

Open Jobs

68 open Chip & Silicon Engineer jobs across 11 companies.

Graphcore1d
Senior Post Silicon Validation Engineer (Bringup)
Austin, Texas, United States·Physical Systems
True Anomaly2w
Senior Electrical Engineer, FPGA Development
Long Beach, CA·Physical Systems
Graphcore2w
Staff SoC Architect
Bristol, UK·Physical Systems
Ricursive Intelligence1mo
Chip Design Engineer
Palo Alto·Physical Systems
Graphcore1mo
Staff Silicon Physical Design Engineer - Bengaluru
Bengaluru, India·Physical Systems
Graphcore1mo
Staff Silicon Verification Engineer - Bengaluru
Bengaluru, India·Physical Systems
Graphcore1mo
Senior Silicon Verification Engineer - Bengaluru
Bengaluru, India·Physical Systems
Graphcore1mo
Senior Silicon Logical Design Engineer - Bengaluru
Bengaluru, India·Physical Systems
OpenAI1mo
Systems Software Engineer, Silicon Bringup
San Francisco·Physical Systems
Waymo2mo
Staff SoC Design Engineer
Mountain View, CA, USA·Physical Systems
Anthropic2mo
Silicon Engineer
San Francisco, CA·Physical Systems
Graphcore2mo
Director of Characterisation
Bristol, UK·Physical Systems
Graphcore2mo
Lead Bring-up & Characterisation Engineer
Bristol, UK·Physical Systems
Graphcore2mo
Senior Physical Design Engineer - Bengaluru, Multiple Vacancies
Bengaluru, India·Physical Systems
Shield AI2mo
Staff Engineer, FPGA Design (R5347)
Seattle, Washington·Physical Systems
Graphcore2mo
Staff Silicon Logical Design Engineer - Bengaluru, Multiple Vacancies
Bengaluru, India·Physical Systems
Graphcore2mo
SoC Architect
Bristol, UK·Physical Systems
Waymo3mo
Staff Silicon Product Engineer
Taipei, Taiwan·Physical Systems
Graphcore3mo
Logical Design Engineer
Bristol, UK; Cambridge, UK·Physical Systems
Graphcore3mo
Silicon Verification Engineer
Bristol, UK; Cambridge, UK·Physical Systems